In conventional integrated circuit fabrication, circuit elements are formed by etching a pattern of gaps in a layer of metal such as aluminum. The gaps are then filled with a dielectric such as silicon dioxide. Copper has increasingly been used as an on-chip conductor for all types of integrated circuitry because of its lower resistance when compared with aluminum alloys. It is, however, difficult to etch copper and, as a result, damascene processes have been developed particularly for the fabrication of copper-based integrated circuits. In such damascene processes, dielectric layers are deposited to form an integrated stack and then etched to form gaps that are subsequently filled with copper.
Fluorosilicate glass (“FSG”) is an attractive replacement for conventional silicon dioxide as an intermetal dielectric for damascene structures. Not only can FSG be deposited with a conventional high-density-plasma (“HDP”) chemical-vapor-deposition (“CVD”) system, it also has a good process scheme in terms of reliability, stability, and throughput. The electrical performance of integrated circuits is generally significantly improved by the lower dielectric constant of FSG (k about 3.3-3.6) as compared with conventional silicon oxides (k about 4.1-4.3). The lower dielectric constant reduces the capacitance between metal lines in the same layer and reduces crosstalk across layers.
The dielectric layers that separate layers of copper in a damascene structure are often referred to as intermetal dielectric (“IMD”) layers. Such IMD layers typically include a barrier layer to prevent diffusion of copper into adjacent dielectric layers such as FSG. Some integrated stacks used in damascene processes also use an etch stop or hardmask to provide for selective etching of the layer. Silicon nitride SixNy is commonly used for such a barrier layer in damascene applications, such as when forming vias between layers containing metal lines. The dielectric constant for silicon nitride is, however, about 7.0 to 7.5, substantially higher than for either conventional undoped silicon oxide or FSG. As a consequence, a dielectric layer containing silicon nitride has an undesirably high fringe capacitance.
Accordingly, silicon-carbon-hydrogen-based low-k barrier layers, such as Applied Materials' BLOK™, have been developed. Such low-k barrier layers are typically deposited by plasma-enhanced chemical-vapor deposition (“PECVD”) using trimethylsilane (“TMS”). While the deposition of BLOK™ provides capping solutions suitable for numerous processes, alternative applications remain desirable to enhance process integration. In addition, it is generally desirable that there be a process capable of depositing a SiC-based layer with a high refractive index, good hardness, and low current leakage.
There thus remains generally a need in the art for an inexpensive method for depositing a SiC-based layer with materials properties that make it suitable for particular desired applications.